
Operating Modes
Mode 3 (internal clock): TRM = 0
if clock source is from TIO pin,
N = write preload
M = write compare
TE
Clock
(TIO pin or prescale CLK)
N
TLR
first event
TIO < CPUCLK + 4
Counter (TCR)
0
N
N+1
M
M+1
0
1
TCPR
M
TCF (Compare Interrupt if TCIE = 1)
TOF (Overflow Interrupt if TCIE = 1)
NOTE: If INV = 1, counter is clocked on 1-to-0 clock transitions, instead of 0-to-1 transitions.
Figure 9-10. Event Counter Mode, TRM = 0
9.3.2 Signal Measurement Modes
The following signal measurement and pulse width modulation modes are provided:
Measurement input width (Mode 4)
Measurement input period (Mode 5)
Measurement capture (Mode 6)
Pulse width modulation (PWM) mode (Mode 7)
The external signal synchronizes with the internal clock that increments the counter. This
synchronization process can cause the number of clocks measured for the selected signal value to
vary from the actual signal value by plus or minus one counter clock cycle.
DSP56311 User’s Manual, Rev. 2
Freescale Semiconductor
9-11